A power factor correction circuit is usually in the form of a step-up converter and includes an inductive storage element, a rectifier arrangement, connected to the inductive storage element, for providing an output voltage, and a switching arrangement connected to the inductive storage element. The switching arrangement regulates the current draw by the inductive storage element on the basis of the output voltage and is connected up such that the storage element periodically draws energy via input terminals and is thereby magnetized, and then outputs the drawn energy to the rectifier arrangement and is thereby demagnetized.
To regulate the power consumption, and hence the output voltage, a power factor controller of this kind generates a control signal which is dependent on the output voltage and which determines particularly the time periods for the magnetization phases of the inductive storage element.
The input voltage for a power factor controller is usually a rectified mains voltage and therefore has a voltage profile in the form of a magnitude of a sign wave. In the case of a power factor controller, the current draw will ideally be regulated such that a mean value for an input current is proportional to the applied input voltage. The power consumption is then proportional to the square of the input voltage and has a sinusoidal profile at a frequency which corresponds to twice the mains frequency. This time-variant power consumption results in a ripple in the output voltage available at the output of the rectifier arrangement, which is higher the smaller the dimensions of an output capacitor in the rectifier arrangement for cost reasons.
To prevent such a ripple in the output voltage from influencing the regulation of the current draw or power consumption, it is known practice to provide a band rejection filter (notch filter) in the control loop, the band rejection filter filtering out signal components at twice the mains frequency. Considering that mains frequencies differ throughout the world, the band rejection range of the filter needs to be chosen to be of appropriate width, for example in order to safely filter out the 100 Hz ripple in a 50 Hz mains and the 120 Hz ripple in a 60 Hz mains. However, the properties of such a filter worsen in terms of damping and group delay time as the width of the band rejection filter increases.
Furthermore, digital filters require a sufficiently accurate clock for sampling the signal which is to be filtered, since the filter characteristic is otherwise subject to the tolerances of the clock signal.
The ripple in the output voltage can also be eliminated by averaging the output voltage over a given time window in order to regulate the power consumption. However, this slows down the regulation and adversely affects the switch-mode converter's ability to react rapidly to sudden load changes at the output.